Summerjob 1: Don't document the design; design the document.
One could implement a state-of-the-art, super intelligent HW/SW design, but without any good documentation it's only a matter of time before it loses all value.
Ink is better than the best memory as the Chinese say.
At Easics, we completely agree, but our philosophy also relies greatly on efficient software techniques and revision control. We have our own software tools that automatically generate textual documentation output for e.g. register maps and test results. Using Git allows us to track their changes and compare different revisions. This method works perfectly for plain text files, which are the input of a document generator such as LaTeX, AsciiDoc, Markdown, …
However, the default file format used by Microsoft Word (.docx) has become a widespread de facto standard for office documents.
Easics has a tool written in C++ to generate Word documents and combine them. All the version control information is lost, however. The goal of this summer project is to expand the tool.
- Generate a document with change bars given 2 commits of source code.
- Generate a document with change bars given two documents differing only in generated content.
Experience with C++ is required. Experience with command line git is a plus.
Application deadline is April 30th 2018.
Summerjob 2: Convolutional Neural Networks
Machine learning is everywhere these days, and Convolutional Neural Networks (CNNs) are one of the most prolific forms of AI on the current market. When trying to use CNNs for live image detection, companies currently have the choice between buying power-hogging GPUs and expensive dedicated ASICs. Quite a few of these companies would like to be able to choose the middle ground by having an FPGA implementation of their networks. That’s where a design house like Easics comes in.
Easics is developping a platform for automatic efficient implementations of Convolutional Neural Networks on FPGA. In order to showcase this platform, we want you to develop, test and analyze a demonstrator application on our platform by implementing an existing neural net (e.g. YOLO, resnet… ). For this you’ll use and enhance our current high-level code-generation flow.
During this summerjob, your task will be to write Python, C and C++ to control and optimize both the data flow and control flow throughout the FPGA. You’ll weigh in on design decisions both for a specific net implementation and general code-generation flow.
We are looking for a team of 2 people with the following profile:
- Problem solvers
- Demonstrated programming experience in C, C++ and Python
- Experience using image processing or deep learning libraries (e.g. Keras) is a plus
- Experience with VHDL is a plus
- Basic experience with (command-line) Git is a plus
Estimated time duration is 6 weeks in july/august, depending on your availability.
Send your resume, motivation letter and availability to firstname.lastname@example.org
You can apply individually or as a team and the application deadline is April 30th 2018.